--======================================
-- Decoder
--======================================
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
entity dec3_8 is
port (
din : in std_logic_vector(2 downto 0) ;
dout : out std_logic_vector(7 downto 0) ;
);
end dec3_8 ;
architecture RTL of dec3_8 is
begin
dout <= "10000000" when ( din =
